By Leena Singh
"As chip measurement and complexity keeps to develop exponentially, the demanding situations of practical verification have gotten a serious factor within the electronics undefined. it truly is now often heard that logical mistakes neglected in the course of useful verification are the commonest explanation for chip re-spins, and that the prices linked to sensible verification at the moment are outweighing the prices of chip layout. to deal with those demanding situations engineers are more and more hoping on new layout and verification methodologies and languages. Transaction-based layout and verification, limited random stimulus iteration, useful assurance research, and assertion-based verification are all ideas that complicated layout and verification groups typically use at the present time. Engineers also are more and more turning to layout and verification types in accordance with C/C++ and SystemC that allows you to construct extra summary, greater functionality and software program versions and to flee the restrictions of RTL HDLs. This new booklet, complex Verification Techniques, provides particular suggestions for those complex verification ideas. The publication comprises reasonable examples and exhibits how SystemC and SCV may be utilized to quite a few complicated layout and verification tasks."
- Stuart Swan
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Extra resources for Advanced verification techniques : a systemC based approach for successful tapeout
It feeds into a four channel DMA block using FIFO’s for flow control. All of the blocks are connected to an AHB bus. The software executing on the micro-controller takes the Ethernet packets and uses DMA transfers to send the data to the rest of the system for processing. The design within a system configuration is shown in Figure 1-5. Figure 1-3. System configuration for multimedia design The functional blocks within the design are shown in Figure 1-6. These components provide the functionality to receive encrypted JPEG data through industry 16 Advanced Verification Techniques defined interfaces (Ethernet)‚ decrypt the JPEG Data through the DES Block‚ decompress the JPEG file and display through the VGA interface.
12 Functional Coverage Functional Coverage is the determination of how much functionality of a design has been exercised by a verification environment. It requires the development of a list of functionality to be checked, the collection of data that shows the functionality of concern being exercised, and the analysis of the collected data. Functional coverage doesn’t prove that the design properly executed the function, just that it was exercised. It is the job of the testbench to prove proper execution.
A thread of activity is started by using the SC_THREAD macro. SCV then adds coordination facilities such as mutexs, semaphores, and mailboxes. Data Structures are needed for stimulus generation and checking. All interfaces today require multiple data fields to be driven. For example, an ethernet packet requires a type, a length, a source address, a destination address, etc. It is much easier to create a software “struct” to capture and manipulate these fields then to create signals in an HDL and try to stretch the language to manipulate the signals.